Although automotive applications are not memory maker Micron’s largest end market, this sector has become increasingly important as autonomous and electric vehicles continue to increase the amount of electronic content in these applications. To that end, Micron has hardened the design of ifs LPDDR5 memory parts to achieve International Organization for Standardization (ISO) 26262 Automotive Safety Integrity Level (ASIL) D certification for these parts.
Certification is based on the 1α (1-alpha) process node and validates that LPDDR5 memory meets stringent functional safety standards and helps position Micron to team up with automakers to enable innovations that will unleash full battery life in smart vehicles.
“We’ve spent the last few years trying to determine all of the events where memory could fail,” said Robert Bilby, senior director of automotive systems architecture for Micron. “Vehicles that drive themselves should be as free of memory errors as possible.”
Bilby noted that the challenge for memory in vehicles is to deliver increasing levels of performance at reduced power. At the same time, the high-volume nature of automotive applications requires vehicle memory to scale in density at continually reduced costs while using advanced semiconductor processing technologies. To that end, Micron argued that memory products for security applications should be consistently classified as Class III complex semiconductors under the guidelines of ISO 26232, the same categorization assigned to processors, SoCs, and GPUs.
The ISO 26262 standard defines different levels of safety in a risk classification system from A to D. Level A systems (such as rear lights) represent the lowest degree of risk in the event of failure, while systems Level D (such as -locked brakes) represent the highest risk. Ensuring that vehicle hardware systems meet safety risk mitigation standards is paramount to Micron as component-level and system-level complexity for many emerging advanced systems platforms d driver assistance (ADAS) is equivalent or superior to that of data centers.
To do the LPDDR5 Compliant with the DRAM ASIL standard, Microchip has designed on-chip security measures that provide benefits to system designers beyond typical JEDEC standard products. These benefits include fault detection capabilities that can meet industry-standard ASIL-D random hardware error metrics.
Additionally, Microchip has integrated DRAM security features that provide significant power reductions, performance improvements, memory efficiency, and board space savings over traditional security implementations and security-based strategies. the use of inline ECC or redundancy to achieve the required security objectives at the system level. ASIL-D compliance is similar to that applied to other complex Class III devices, such as CPUs, SoCs, and GPUs.
Micron has also strengthened its quality control by offering extended safety analysis warranties for existing QM grade products to support customer onboarding, and an extensive global network of automotive systems labs near many customer sites that provide remote virtual lab support.
According to Bilby, LPDDR5 DRAMs are Micron’s first memory products to fully comply with ASIL-D requirements. The company will gradually redesign its other memory products to be ASIL-D compliant.
Spencer Chin is editor of Design News and covers electronics beat. He has many years of experience in the development of components, semiconductors, subsystems, power and other facets of electronics, both from a business/supply chain perspective than technological. He can be reached at [email protected]