Low-power cryptographic smart chip detects, stores, computes and secures data


In our modern world, we are surrounded by sensors that constantly collect, consume, store and communicate an enormous volume of information, information that is increasingly vulnerable to theft and misuse. IoT edge sensors tend to operate with limited hardware resources and low power budgets, which makes it difficult to implement encryption algorithms. A solution proposed by Penn State researchersled by Saptarshi Das, showcases an 8×8 “all-in-one” area of ​​robust, low-power, bio-inspired encryption engines that can integrate with IoT edge sensors, enabling data encryption .

Since silicon, commonly used to make transistors for cellphones, would not be able to build a transistor small enough to limit power consumption, the team turned to 2D materials. Specifically, they turned to molybdenum disulfide or MoS2, a material less than a nanometer thick, to create a low-power cryptographic chip.

Basing the chip design on MoS2, Penn State’s smart hardware platform reduces power consumption while adding a layer of security. By exploiting the optoelectronic sensing and in-memory computation capabilities of 2D mem transistors based on MoS2 photosensitive monolayer, it is possible to introduce near-sensor and robust security solutions for IoT edge devices with minimal hardware investments and frugal energy expenditure. 2D mem transistors are three-terminal rather than two-terminal devices, and their additional gate terminal allows both non-volatile and analog programming of conductance states as well as electrostatic control of the 2D channel.

The chip design uses three hundred and twenty MoS2 transistors, each having a sensing unit, a storage unit, and a computing unit to encrypt the data. In this way, the chips are self-sufficient, providing all-in-one IoT capabilities, including security. State-of-the-art silicon-based complementary metal oxide semiconductors or CMOS, on the other hand, are limited in terms of memory and computer integration due to their traditional von-Neumann computer architecture. . Non-von-Neumann platforms such as field-programmable gate arrays or FPGAs, however, lack sensing capabilities and require CMOS peripherals. The proposed three-terminal mem transistor technology – with the added function of photosensitivity due to the material properties of MoS2 – offers a holistic solution which is essential for obtaining integrated and energy- and area-saving solutions.

An 8×8 crossbar array was fabricated for testing, the methods and results of which are published in Communication Nature. Using machine learning algorithms to study output patterns and predict input information, the research team found that these arrays should be safe from eavesdropping, given the limited resources and l access to deep neural networks. That is, advanced machine codes could not decode encrypted information, and without prior knowledge of information channels and decoding variables, it would be extremely difficult to do so.

In the near future, Das and the team plan to contact federal agencies and private companies specializing in intelligent security to expand the scope of the research.


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